发明名称 Memory space compression technique for a sequentially accessible memory
摘要 A technique for conserving digital memory space is disclosed. This technique includes sequentially transmitting a first address and a second address on a first bus coupled to a FIFO memory. The first address is stored in the memory and compared to the second address to determine a first value corresponding to a difference between the first and second addresses. This first value is written in the memory to represent the second address and has a bit size smaller than the second address. A method to decode the first value to regenerate the second address is also disclosed. These techniques may be further enhanced by only storing an address in a sequential access memory when it differs from the most recently stored address in the memory.
申请公布号 US6167499(A) 申请公布日期 2000.12.26
申请号 US19970859168 申请日期 1997.05.20
申请人 VLSI TECHNOLOGY, INC. 发明人 LETHAM, LAWRENCE
分类号 G11C7/10;G11C8/04;G11C19/00;(IPC1-7):G06F7/00 主分类号 G11C7/10
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