发明名称 MEMORY CIRCUIT OF STATIC OPERATON TYPE
摘要 PURPOSE:To establish the static operation type memory circuit less in the element number and small in power consumption, by connecting the first and second negative resistance elements different in the polarity, consisting of the semiconductor forming PN junction. CONSTITUTION:The P or N type area terminals 112 and 212 connected to the electrode film of the P channel and N channel gate control negative resistive elements DP and DN, are connected to the memory terminal 100. The voltage VDD is fed to the N type substrate terminal 111 of element DP, and the P type substrate terminal 211 of the element DN is kept at zero potential. The terminal 100 is connected to the power supply terminal 130 via the capacitor C1, and to the bit line B and the word line W via the switching transistor TrT1. The potential VM at the terminal 100 is controlled at the potentials V1 and V2 depending on the two stable points S1 and S2 with the currents I1 and I2 of the elements DP and DN. The capacitor C1 is charged up by taking this potential as 1,0 of the memory information, and this is delivered from the W line to the B line via TrT1. Thus, the memory circuit less in the number of elements and small in the power consumption, can be obtained.
申请公布号 JPS54156440(A) 申请公布日期 1979.12.10
申请号 JP19780064288 申请日期 1978.05.31
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 UCHIDA YUKIMASA
分类号 G11C11/41;H01L27/105;H01L29/74 主分类号 G11C11/41
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