发明名称 MEMORY CONTROL SYSTEM
摘要 PURPOSE:To eliminate the conflict between the data and the test code for the initialization control system of the memory by invalidating the error detection/correction circuit, reading the data out of the memory and adding the error correction code to then write it into the original memory. CONSTITUTION:With execution of the initialized program, ''0'' is set to register 9 on memory unit 5 to invalidate error detection/correction circuit 8. The address of unit 5 is set to register R0 within central process unit 1, and then the data is read out to be set to register R1. The error correction code grown at circuit 7 is added the data read out, and the data is written into the original address of unit 5. When this operation is given to the data of the fixed region, ''1'' is set to dissolved between the error correction code and the data within unit 5.
申请公布号 JPS54154937(A) 申请公布日期 1979.12.06
申请号 JP19780064144 申请日期 1978.05.29
申请人 FUJITSU LTD 发明人 SHIBATA TOMOHITO;NODA KANZOU;HASHIMOTO SHIGERU
分类号 G06F12/16;G11C29/00 主分类号 G06F12/16
代理机构 代理人
主权项
地址