发明名称 CIRCUIT ASSIGNMENT CONTROL SYSTEM OF TIMEEDIVISION MULTIPLE NETWORK
摘要 PURPOSE:To improve transmission efficiency by allowing transmitting information of the same transmission rate, queued in a group of transmission requests, to stand by on a data buffer. CONSTITUTION:The common divisor of a transmission rate which corresponds to a transmission request from a terminal is regarded as a unit rate and on the basis of the unit rate, times slots on time-division multiple circuits 21...26 are assigned to respective terminals at the same transmission speed. Then, time-division multiplexers 2-0, 2-1 and 2-2 allocate transmitting informaton equivalent to each transmission request to an idle time slot among time slots assgined to terminals and then allows transmitting information of the same transmission rate, queued in a group of transmissiin requests, to stand by on a data buffer. Consequently, even if transmission requests of different rates coexist, they can be sent in sequence unless there is an idle time slot, thereby improving the transmission efficiency.
申请公布号 JPS54152407(A) 申请公布日期 1979.11.30
申请号 JP19780060767 申请日期 1978.05.22
申请人 FUJITSU LTD 发明人 MATSUOKA KAZUO;FUJIMURA NORIAKI;SHIBATA TOMOHITO;HASHIMOTO SHIGERU
分类号 H04J3/00;H04L5/22;H04L12/52 主分类号 H04J3/00
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