| 摘要 |
PURPOSE:To realize the stable and high-speed operation, low power consumption and high yield by reducing the capacity of a digit line by reducing the number of memory cells connected to one digit line by the use of a switching transistor. CONSTITUTION:To couples of input terminals of differential digit sense amplifiers SA1 to SA3, several digit lines are connected via switching elements respectively. As for the same sense amplifier, memory cells (M11 to M41) are connected to different address lines (A1 to A4) and each of reference cells (Mr11 to Mr41) is connected to each digit line. Then, the switching element of a digit line connected to a selected memory cell is made conductive and the corresponding switching element is also made conductive so that a reference terminal will be connected to one input terminal of the sense amplifier with the other terminal connected previously to the element. |
