| 摘要 |
<p>PURPOSE:To correctly determine the polarity of the phase synchronizing circuit without providing any fixed pattern by detecting the ''101'' pattern of the digital data having undergone modified FM (MFM) modulation. CONSTITUTION:The MFM signal having been reproduced is shaped to a pulse width of 1/4 or other of data bits by a pulse shaping circuit 2 and is then applied to an exclusive-OR circuit 3 and inverter 8 forming a phase comparator. On the other hand, the pulses of the phase delayed by 90 deg. with respect to the data bits are applied at the period of 1/2 the data bit period by a loop filter 5 and variable frequency oscillator 4 to the circuit 3. The circuit 3 in turn generates the phase error pulses. This causes a 4-bit counter 6 to generates a signal each time when it counts the 8th one of the phase difference pulses existing between the adjoining MFM pulses, thereby setting an FF 9. Hence, the FF 9 is set according to the input of the ''101'' pattern of the MFM signal, thus the polarity of the phase synchronizing circuit is correctly determined and the demodulation of the MFM signal is accomplished without providing any fixed pattern.</p> |
