Master-slave flip-flop circuit

摘要

This invention is a phase inversion circuit of improved stability of operation for a master-slave flip-flop circuit. An additional gating circuit is controlled by two signals, one from an output of the slave flip-flop circuit and the other from an externally applied phase inversion signal. The output of the additional gating circuit is connected to the master flip-flop circuit through a circuit means that also receives a signal from the slave flip-flop output circuit. In the absence of inversion signals the circuit means controls the master flip-flop circuit from the slave flip-flop circuit and the master flip-flop circuit controls the slave flip-flop circuit with the assistance of the timing pulses in the usual manner. The phase inversion signal can be applied over a wide range of timing intervals of the timing circuit provided the inversion signal overlaps at least partly one of the timing pulses of the regular timing signal when the normal output signal of the slave flip-flop is a " 0" and the normal output signal of the master flip-flop circuit is also a " 0".