发明名称 MEMORY DEVICE
摘要 PURPOSE:To avoid the inversion of the data input at the early writing time and thus to accelerate the operation of the semiconductor memory device by providing the circuit part which forms the inforamtion transmission line between the read/ write terminal and the input/output common terminal featuring the plural functions. CONSTITUTION:The 1st terminal features a structure in which read/write terminal R/W is connected to the bases of transistor TrQ1 and Q2 connected to the digit line of semiconductor memory device C; and the I/O common terminal featuring the plural functions is connected to the 2nd terminal. Read/write control circuit 50 contains the 1st and 2nd terminals of such constitution. Furthermore, reading circuit 40 containing inversion gate G6 possessing sense amplifier SA plus output O1 and O2 is provided to the collectors of TrQ1 and Q2. Thus, output O2 which is the same phase as data output O1 connected to the 2nd terminal is read out from circuit 40 and then fed back to circuit 50. And gate G3 and G4 of circuit 50 are not put under the writing state even with the writing state of terminal R/W, thus preventing the inversion of the data input.
申请公布号 JPS54148339(A) 申请公布日期 1979.11.20
申请号 JP19780056764 申请日期 1978.05.12
申请人 NIPPON ELECTRIC CO 发明人 NOKUBO JIYOUICHI
分类号 G11C11/414;G11C11/413;G11C11/416 主分类号 G11C11/414
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