发明名称 CARRIER WAVE EXTRACTING CIRCUIT
摘要 PURPOSE:To secure a stabilized operation even in case the ratio is small between the carrier wave power and the noise power by using the logic sum signal of the output signal of the pulse generator circuit and the output of the differential circuit as the input signal of the digital n-division means. CONSTITUTION:In case pulse row (a) having the pulse dropped off partially is supplied, the output of differential circuit 53 becomes like (b). Pulse generation circuit 59 counts the clock from the rise time of the input pulse, and its output features like (c) under TCA/2<T1<TCA. Pulse generation circuit 58 has the pulse rise from the rise time of (c) like (d) and then has the fall after time T2 equivalent to the input pulse duration. While the output of logic sum circuit 57 features like (e). Accordingly, the pulse is inserted to the position where the pulse of the input pulse row is dropped off, and thus no output of circuit 58 emerges unless the input pulse interval is not longer than T1. And the pulse row of output 52 becomes identical exactly to that of the input.
申请公布号 JPS54148355(A) 申请公布日期 1979.11.20
申请号 JP19780056782 申请日期 1978.05.12
申请人 NIPPON ELECTRIC CO 发明人 IWAISHI YOSHIHIKO;TAKASE ICHIROU
分类号 H04L27/227 主分类号 H04L27/227
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