发明名称 |
VERTICAL DEFLECTION CIRCUIT |
摘要 |
<p>A vertical deflection circuit having a vertical amplifier stage bias voltage stabilizing circuit including a differential amplifier circuit which operates only during the retrace period. One input of the differential amplifier circuit receives a D.C. bias voltage and the other input receives the mean voltage of an output signal. The output of the differential amplifier circuit is fed back to a drive stage to stabilize the bias voltage.</p> |
申请公布号 |
CA1066800(A) |
申请公布日期 |
1979.11.20 |
申请号 |
CA19760255122 |
申请日期 |
1976.06.17 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
FUJITA, OSAMU |
分类号 |
H03K4/72;(IPC1-7):04N3/16 |
主分类号 |
H03K4/72 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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