发明名称 MONITOR SYSTEM FOR LINE ERROR RATE
摘要 PURPOSE:To inform the error generation in a short time, by repeating the error pulse count so that the repetitive reset can be made in a plurality of periods sequentially longer at the counter circuit, and decreasing the monitor period as the error rate is higher through the repetition of the error pulse count. CONSTITUTION:The counter circuit 2 is repetitively reset in a plurality of periods having sequential longer period, repeats the count of the error pulse E, and an output is caused when the count value is more than a given value in the monitor period. Further, when the counter circuit 2 causes an output, the count is again made at the monitor period at that time, and an alarm is caused with the output of the register 3 when the counter circuit 2 produces an output continuously by the set number. Thus, as the error rate is higher, the monitor period is decreased and the production of error can be informed in a short time.
申请公布号 JPS54147707(A) 申请公布日期 1979.11.19
申请号 JP19780056035 申请日期 1978.05.11
申请人 FUJITSU LTD 发明人 FUKUSHIMA TAKEO;MIZUGUCHI MASAMI
分类号 H04L1/00;H04L1/24;H04L25/02 主分类号 H04L1/00
代理机构 代理人
主权项
地址