Generator for timing signal without overlap - uses three N-type MOS transistors connected with two inverters

摘要

The two phase timing signal generator uses metal oxide semiconductor technology with a N channel. The circuit has three transistors (T1, T2, T3) and with load resistors (RL1, RL2, RL3) and two inverters (I1, I2). As the MOS transistors are of enriched N type the circuit is fed from a voltage VDD which is positive with respect to earth. The three transistors are connected as inverters and their load resistances can be formed in various ways i.e. diffused resitances, MOS transistors, deflection changes. The inverter circuits all introduce the same delay. Each inventer circuit is formed from two complementary MOS transistors connected in series. Their grid are connected to form a control input.