摘要 |
<p>A portion (10) of a COS/MOS integrated circuit device employs closed gate geometry insulated gate field effect transistors (IGFETs) (12, 14, 16). The three IGFETs are N-channel devices formed in a P well formed in the N-substrate. The transistor (12) has a closed gate geometry gate (18) transistor (14) likewise gate (20) and transistor (16) gate (22). the region (24) which surrounds the gates (18, 20) is an N+ source plane which extends from the surface of the portion (10) down into the P well. The N+ source plane (24) provides a common source for transistors (12, 14). Transistor (16) is formed with its gate (22) completely surrounded by the gate (20) of transistor (14). A region (26) serves as the drain of the transistor (12).</p> |