发明名称 DRIVING CONTROL SYSTEM OF SHIFT REGISTER CIRCUIT
摘要 PURPOSE:To reduce consumption power by forming a positive feedback loop dependent upon complementary inversion circuit for a storage circuit and stabilizing the data holding of a storage means when the frequency of each pair of complementary clock pulses in sequential operations is lowered. CONSTITUTION:Input data selection circuit 30, storage circuit 20 where shift registers 211...21N are connected continuously, control pulse generator circuit 70 which generates control pulses to shift successively data in circuit 20, and command control signal generator circuit 60 which controls the oeration of circuit 70 by commands are provided. In circuit 20 of this constitution, the first and the second complementary MOS inversion circuits which are driven by a pair of the first and the second complementary clock pulses phi1 and phi2 and the third complementary MOS inversion circuit which is driven by the third complementary clock pulse phi3 are provided, and further, feedback circuit 23 which feeds back the output if circuit 20 to circuit 30 positively is provided. then, the system is so constituted that pulse phi1 may be established durisng the non-establishment period of the second pulse phi2 as well as the third pulse phi3 and pulse phi3 may be established after pulse phi2 is established.
申请公布号 JPS54143031(A) 申请公布日期 1979.11.07
申请号 JP19780051639 申请日期 1978.04.28
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 HIRASAWA MASATAKA
分类号 G11C19/28 主分类号 G11C19/28
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