发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To secure a substantial increment of the memory capacity for RAM by realizing an allotment of the address range equivalent to the address range defined by the output address information of the microprocessor to the RAM. CONSTITUTION:In terminal unit 1, microprocessor 6 undergoes the control of microprocessor control part 7 and is then connected to memory control circuit 5 via address bus 3 and data bus 10. Circuit 5 supplies unconditionally the address information on bus 3 to the address input of RAM9 while receiving ROM inhibit information 4 from part 7. In case the address information on bus 3 is included in the ROM allotment address region shown by memory region setting circuit 2 when no information 4 is received, the address information is applied to the address input of ROM8. And in case the address information is included in other address regions, the address information is sent to the address input of RAM9.
申请公布号 JPS54142040(A) 申请公布日期 1979.11.05
申请号 JP19780050569 申请日期 1978.04.27
申请人 HITACHI LTD 发明人 WATANABE HIDEO;NOMURA NOBUTAKA;SHIMIZU KAZUTOSHI
分类号 G06F11/22;G06F9/06;G06F9/445;G06F12/06;G06F15/00 主分类号 G06F11/22
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