发明名称 Polysilicon TFT device and manufacturing method thereof
摘要 The present invention discloses a polysilicon TFT device and the manufacturing method thereof. The polysilicon TFT device comprises: a scanning line and a data line arranged alternately; a semiconductor layer electrically connected with the scanning line and the data line; and a pixel electrode electrically connected with the semiconductor layer. Multiple channel regions and multiple doped regions are provided sequentially with interval between the connecting point of the semiconductor layer with the data line and the connecting point of the semiconductor layer with the pixel electrode, the channel regions are the portions of the semiconductor layer overlapping the scanning line, the rest portions are the doped regions, the width of at least one said doped region is 0.5˜3 μm, the ion doping concentration is 2*E11˜5*E15. In the present invention, the pattern of the semiconductor layer is designed as a bending pattern, which sequentially intersects the scanning lines and forms multiple channel regions and multiple doped regions provided with interval. It reduces the leakage current by controlling the width of the doped region and the ion doping concentration.
申请公布号 US9373646(B2) 申请公布日期 2016.06.21
申请号 US201414234994 申请日期 2014.01.02
申请人 Shenzhen China Star Optoelectronics Technology Co., Ltd 发明人 Zhao Guo
分类号 H01L27/14;H01L29/04;H01L29/15;H01L31/036;H01L27/12;H01L29/786;H01L29/66;H01L29/10 主分类号 H01L27/14
代理机构 代理人 Cheng Andrew C.
主权项 1. A polysilicon TFT device, comprising: a scanning line and a data line arranged alternately; a semiconductor layer electrically connected with the scanning line and the data line; and a pixel electrode electrically connected with the semiconductor layer; wherein, multiple channel regions and multiple doped regions are provided sequentially with interval between a first connecting point of the semiconductor layer with the data line and a second connecting point of the semiconductor layer with the pixel electrode, the channel regions are the portions of the semiconductor layer overlapping the scanning line, the rest portions of the semiconductor layer are the doped regions, wherein a width of at least one of the doped regions is 0.5˜3 μm, and an ion doping concentration 2*E11˜5*E15.
地址 Shenzhen, Guangdong CN