发明名称 |
Semiconductor memory devices and methods of fabricating the same |
摘要 |
A semiconductor memory device may include stacks arranged in a first direction and vertical channel structures provided through the stacks. Each of the stacks may include gate electrodes and insulating layers alternately stacked on a substrate. Each of the vertical channel structures may include a semiconductor pattern connected to the substrate and a vertical channel pattern connected to the semiconductor pattern. Each of the semiconductor patterns may have a recessed sidewall, and the semiconductor patterns may have minimum widths different from each other. |
申请公布号 |
US9373635(B2) |
申请公布日期 |
2016.06.21 |
申请号 |
US201514801430 |
申请日期 |
2015.07.16 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Jung Won-Seok;Kim Youngok;Kim Jihye;Joo Kyungjoong |
分类号 |
H01L27/115;H01L23/535;H01L29/51;H01L29/423;H01L27/06 |
主分类号 |
H01L27/115 |
代理机构 |
Myers Bigel & Sibley, P.A. |
代理人 |
Myers Bigel & Sibley, P.A. |
主权项 |
1. A semiconductor memory device, comprising:
stacks separated from each other in a first direction by a trench, each of the stacks comprising insulating layers and gate electrodes alternately and repeatedly stacked on a substrate; first and second semiconductor patterns arranged along the first direction, each of the first and second semiconductor patterns being inserted in a lower portion of each of the stacks and being connected to the substrate; first and second vertical channel patterns in each of the stacks on the respective first and second semiconductor patterns; and a common source plug in the trench, wherein the first semiconductor pattern is closer to the trench than the second semiconductor pattern, and wherein a minimum width of the first semiconductor pattern is less than that of the second semiconductor pattern. |
地址 |
KR |