发明名称 |
MOS address buffer selector circuit - has two-condition trigger stage and switching network permitting dynamic operation |
摘要 |
<p>The MOS address buffer selector circuit has a control stage between the controlled stage of a driver transistor and a reference voltage source. This control stage consists of the channel of a scanning transistor and the channel of an information transistor selectable via an address input. A switching circuit loads the controlled stage of the driver transistors with the reference voltage after the address data has been received into the two-condition trigger stage.</p> |
申请公布号 |
DE2818350(A1) |
申请公布日期 |
1979.10.31 |
申请号 |
DE19782818350 |
申请日期 |
1978.04.26 |
申请人 |
SIEMENS AG |
发明人 |
V.,DIPL.-ING. BASSE,PAUL-WERNER;HOFMANN,RUEDIGER,DR.RER.NAT. |
分类号 |
G11C8/06;G11C11/408;G11C11/418;(IPC1-7):G11C7/00;G11C8/00 |
主分类号 |
G11C8/06 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|