发明名称 |
CIRCUIT FOR COMBINING PULSE TRAINS |
摘要 |
<p>CIRCUIT FOR COMBINING PULSE TRAINS An electric circuit with a plurality of inputs, each input receiving a train of pulses. Each pulse of each train sets a latch of cross-coupled logic gates to an output of logic 1. A clock generating regular voltage pulses is connected in parallel to the latches so as to reset the output of each gate to logic 0 in series with each other. The plurality of outputs from the latches is passed through a common gate to form the output train of pulses as an addition of the plural inputs.</p> |
申请公布号 |
CA1065416(A) |
申请公布日期 |
1979.10.30 |
申请号 |
CA19760261972 |
申请日期 |
1976.09.24 |
申请人 |
COMBUSTION ENGINEERING, INC. |
发明人 |
ROSSO, JOHN B.;GARRETT, SHEYRL W. |
分类号 |
H03K3/78;(IPC1-7):03K3/78 |
主分类号 |
H03K3/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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