| 摘要 |
PURPOSE:To transmit changeable data correctly under no control of transmissiom cycle by detecting and storing changeable data transmitted cyclically and providing a means which counts the number of state change times. CONSTITUTION:The state change of changeable data of line 1a is detected in 13, and a shift signal is outputted to line 1b. Then, state data is stored in memory 11, and simultaneously, counter 14 is increased by +1. The output of counter 14 is inputted to decoder 15, and the output of decoder 15 is made into one high level of line 16a of memory 16 according to counting. When the address of a pertinent unit is supplied from series-parallel (PS) converter circuit 4 to address collation circuit 3 in the cyclic transmission, an address coincidence signal is outputted to operate selection 17. Circuit 17 controls gate 12 to transmit changeable data of memory 11 successively from circuit 4 in each transmission cycle according to the counted number of counter 14. |
