CMOS integrated schmitt trigger - has cross connected NOR=gates and inverter whose 1-level is reached earlier than by second NOR=gate

摘要

The trigger uses flip-flops consisting of cross-connected NOR gates so that one NOR gate input is connected to the output of the other NOR gate. A further free input of the NOR gate (1) is connected to the signal input (Ue) through an inverter (4). This gate (1) output is the signal output (Ua). A free input of the NOR gate (2) is connected directly to the signal input (Ue). The inverter and the second NOR gate (2) are such, that the logic level "1" for the inverter (4) is reached at a lower level of the input signal (Ue) than that necessary for reaching logic level "1" for the second NOR gate (2).