Information shunting system for digital processor - uses two registers and code lines between individual storage cells

摘要

The information shunting system is used to shunt information to the left or right by a given number of places during a clock period. It comprises two registers (1, 2) each with a number of storage cells(3) which are coupled via code lines(13i) each coupled to the inputs of a group of storage cells in each register(1, 2). The first information output(7) of each storage cell(3) of the first register(1) is coupled to the first information input (4) of a corresponding cell of the second register(2) etc., so that for each cell of each register(1, 2) each information input(4, 5, 6) is connected with a corresponding output(7, 8, 9).