| 摘要 |
<p>PURPOSE:To obtain a ROM circuit featuring high density and high speed by providing both the charging and discharging means and also separating plural units of memory cells connected in series into two parts. CONSTITUTION:The same line of the memory of n-lines X 128 rows is separated into the 1st part containing FETM1-M64 and the 2nd part including FETM65- M128 respectively with use of N-type MOSFET. The levels of row selection lines A1-A128 are all set to 1 to make FETM1-M128 conduct, and signal phiP is set to a high potential to make FETMPL and MPR conduct. Then the memory cells connected in series in 64 steps each are charged in sequence. After selecting only one piece of the rwo selection line, phiP is set to a low potential to make FETMPL and MPR nonconductive and to set signal phid at a high potential. Thus, FETMdt and MdR are made to conduct. In this way, the address line is divided into two parts, and thus the resistance and capacity becomes half at the charging and discharging time each. As a result, the charging/discharging speed increased to secure a high operation.</p> |
