MEMORY UNIT

摘要

PURPOSE:To prevent both the lowering of the fault detection capacity and the increment of the test time in case the interference is tested between the adjacent memory cells by providing the converter circuit and then giving consideration to the physical location of the memory cell. CONSTITUTION:Converter circuit 51 is provided to memory unit 50. Address circuit 4 delivers 1st address signal 52 to connection line 444 to indicate the necessary address within unit 50 by using the address signal as the input. Then circuit 51 performs the conversion of the signals with signal 52 from line 444 used as the input in order to avoid the fact that the address difference of line and row address signals 53 and 54 of the lines and rows adjacent physically to each other may not be zero based on odd value n (3<=n) in terms the line and row of memory element 6. Thus, signal 53 and 54 are delivered to connection line 555. Then the writing is given to element 6 via signal 53 and 54.