SEMICONDUCTOR DEVICE HAVING A DARLINGTON CIRCUIT

摘要

In a Darlington circuit with integrated speed-up diode the parasitic four-layer effect (p-n-p-n), which is detrimental to the circuit, is removed by giving the diode a divided configuration. The width of the sub-regions is chosen to be so small that the short-circuited p-n junction between the cathode of the diode and the base of the control transistor cannot or substantially can not be biased in the forward direction in the inner part of the semiconductor device.