发明名称 CONTROL SYSTEM FOR CASH MEMORY
摘要 PURPOSE:To perform good efficiency control, by excluding the exisitng and old block with good efficiency, in fetching new blocks from the main memory to the cash memory. CONSTITUTION:In the data processing unit having the cash memory, when CPU performing operation control accesses the main memory, and when the old data already stored in the cash memory is excluded, the control ROM 47 which takes input the output of the comparator comparing the output of the address register with the output of the directory and the directory 42 and further with the initial write signal 81, is provided. Further, the Priority Register 46 which designates the priority of bank constituting the cash memory with the output of ROM 47 is provided and the old data in the cash memory is excluded with the LRU system.
申请公布号 JPS54128639(A) 申请公布日期 1979.10.05
申请号 JP19780036095 申请日期 1978.03.30
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 MUKAERITA TAKASHI;KOBAYASHI YOSHIYUKI
分类号 G06F12/08;G03G21/00;G06F12/12;G06F13/00 主分类号 G06F12/08
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