发明名称 BONDING METHOD
摘要 <p>A plurality of metal studs are plated on a chip carrier surface in a pattern to match a terminal metal footprint on a chip to be joined. The studs are of sufficient height to permit flux cleaning, if necessary. After the studs are in place, the chip is aligned with the carrier and attached thereto, the chip pads containing a small amount of solder to provide the connecting joints. The carrier and chip are made of materials having nearly equal thermal expansion characteristics.</p>
申请公布号 JPS54128688(A) 申请公布日期 1979.10.05
申请号 JP19790015122 申请日期 1979.02.14
申请人 发明人
分类号 H05K3/34;H01L21/60;H01L21/768;H01L21/822;H01L23/485;H01L23/522;H01L23/538;H01L27/04;H01L39/00 主分类号 H05K3/34
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