发明名称 DYNAMIC MOS MEMORY IC
摘要 PURPOSE:To omit application of the substrate bias voltage as well as to reduce the number of the terminal by increasing the quantity of the feed ion injection more at the MOS memory cell part than at the peripheral circuit part. CONSTITUTION:The dynamic MOS memory IC is constituted with MOS memory cell part A and peripheral circuit B. For this IC, field insulator film 5 is covered over Si substrate 4, part 6 to form the MOS memory cell is distributed in a matrix formation at part A, and part 7 to form the decoder, buffer and others is provided at part B respectively. The impurity of the same conducting type as substrate 4 is injected with a high dose under field insulator film 8 of part A to form region 9, and the same impurity is injected with not so high dose as region 9 under the field insulator film of part B to form region 10. In this way, only the threshold voltage of the parasitic MOS transistor at part A can be enhnaced sufficiently. Thus, the application of the substrate bias voltage is required.
申请公布号 JPS54128299(A) 申请公布日期 1979.10.04
申请号 JP19780035552 申请日期 1978.03.29
申请人 HITACHI LTD 发明人 YASUNARI KENJIROU;SATOU KATSUYUKI
分类号 H01L27/10;G11C11/41;H01L21/76;H01L21/822;H01L21/8242;H01L27/04;H01L27/108 主分类号 H01L27/10
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