发明名称 BIPOLAR MEMORY
摘要 <p>PURPOSE:To secure the steady operation to the fluctuation of the power supply by forming the base voltage at the selection time of the current switch transistor via the constant voltage circuit which utilizing the base-emitter constant voltage of the transistor. CONSTITUTION:The output sent from Y address decoder 1 is supplied to current switch circuit 3 via bit wire selection circuit 2, and the reading current is flown to the selected bit wire by controlling reading current source 4 which is provided in common to a pair of bit wires (D, D ). Circuit 2 consists of the current supply means comprising the series circuit of transistor Q5 controlled by the output of the Y address decoder, level shift diode D1 and resistance R2 plus the constant voltage circuit comprising transistor Q6 and resistance R3 and R4 respectively.</p>
申请公布号 JPS54128227(A) 申请公布日期 1979.10.04
申请号 JP19780035514 申请日期 1978.03.29
申请人 HITACHI LTD 发明人 KATOU YUKIO
分类号 G11C11/41;G11C11/414;G11C11/416 主分类号 G11C11/41
代理机构 代理人
主权项
地址