发明名称 PROGRAMMABLE LOGIC ARRAY
摘要 PURPOSE:To obtain the programmable logic array easy for inspection, by providing the selection section which outputs the logical product signal selected with the control signal at inspection and the AND array section taking the logical product of result from the interpretation circuit of the input signal. CONSTITUTION:When the logical value 1 is given from the control signal 35 to the decoder circuit section 30, the output line of the decoder 37 is at logical value 1 for one line according to the state of the input signal 36. When the signal 35 is 0, the output line 38 from the decoder 37 is into one state at the same time. Thus, the output of the circuit 37 is programmed so that the product item line 40 is exclusively selected at each cross point 39 of the AND array section 32. To the decoder circuit 31, only the input signal 41 is given and the output line 43 is at logical value 1 for one line according to the state of the signal 41. In the output 43, at each cross point 44 of the array 32, the logical product of the desired input signal is given on the product item line. The logical product signal from the line 40 is programmed so that the logical sum is obtained on the sum item line 46 at each cross point 45 of the OR array 33 and output is made from the output hold circut 34.
申请公布号 JPS54123864(A) 申请公布日期 1979.09.26
申请号 JP19780031340 申请日期 1978.03.17
申请人 NIPPON ELECTRIC CO 发明人 YANO MASAAKI
分类号 G06F7/00;H03K17/00;H03K19/177 主分类号 G06F7/00
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