| 摘要 |
A junction field effect transistor has a first conductivity type substrate with high impurity concentration, a first conductivity type layer with low impurity concentration which is layered on the substrate, a first region of first conductivity type and with high impurity concentration which is formed in the surface region of the layer, and a second region of second conductivity type and with high impurity concentration which is formed in the surface region of the layer, substantially surrounding the side wall of the first region. The thickness of the layer is within the range from 4.0 to 6.0 mu m. The minimum width of the portion surrounded by the second region and the impurity concentration of the layer fall within the area with four corners A, B, C and D where these corners correspond to the four coordinates (log10 4x1015, 2.0), (log10 18x1015, 1.2), (log10 18x1015, 0.5) and (log10 4x1015, 1.1) of a rectangular coordinates of which the Y-distance represents the minimum width and the X-distance is the impurity concentration in the logarithmic scale.
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