发明名称 DC LEVEL ADJUSTER
摘要 <p>PURPOSE:To enable calibrated levels to be obtained with ease and good accuracy by providing a DC voltage generating circuit connected to the slider of a variable resistor and generating the specified DC voltage in response to the DC voltage obtainable with the slider. CONSTITUTION:A variable resistor 21 is connected between power sources +V1, -V2 and its slider is connected commonly to the bases of an NPN transistor 22 and a PNP transistor 22. The collectors of both transistors are respectively connected to positive and negative power sources and the emitters are mutually connected, are led to output terminal 25 and are grounded through a resistance 24. If with such constitution, the rotating angle theta of the slider is gradually increased, the utput voltage VB also gradually increases but when it reaches O volt, the transistors 22, 23 both cut off to maintain O volt only by a certain width of theta, after which the output voltage VB again increases with an increase in theta. This device uses said O volt as a calibrated level and connects the resistance 24 to a power source Vcal other than the O volt without grounding.</p>
申请公布号 JPS54122166(A) 申请公布日期 1979.09.21
申请号 JP19780029322 申请日期 1978.03.16
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 ENDOU KENJIROU;ARAI TOORU
分类号 G01R15/00 主分类号 G01R15/00
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