| 摘要 |
PURPOSE:To alleviate the burden imposed on an operation processing means by letting the value of the dividing ratio 1/M of a dividing means be the same value as in the steady-state of (XN1) speed mode until it gets to the steady-state of (XN2) speed mode. CONSTITUTION:A rotation detection signal obtained from a frequency generator 2 is divided by 1/M with a dividing circuit 15 and inputted into a data latch circuit 6. A microcomputer 16 outputs a control signal in comparing a measurement period M of the data latch circuit 6 with a target period Tr corresponding to the speed command data Nv. Here, in switching from the steady-state of (XN1) speed mode to (XN2) speed mode, let the target period Tr be a value of N2XT1 with the dividing ratio of the dividing circuit 15 kept at 1/N1 as it is. After it was in the steady-state of the (muN2) mode, let the dividing ratio of the dividing circuit 15 be 1/N2 and the target period Tr be T1. |
