发明名称 NONVOLATILE MEMORY CIRCUIT
摘要 <p>PURPOSE:To obtain a nonvolatile memory circuit featuring the reduced amount of the power consumption by securing the serial connection between the memory comprising the MISFET featuring the variable threshold voltage and the load consisting of the MISFET. CONSTITUTION:Load MISFET2 is connected to the drain of memory MISFET1 featuring the variable threshold voltage. For the reading action, the voltage is applied to gate input 3 and 4 to secure the break and conduction for FET1 and 2 each. Thus, the drain capacity of FET1 is charged. Then the voltage is applied to gate 4 to cut off FET2, and the voltage between the low threshold level and the high threshold level of FET1 is applied to gate 3 to read out the information through output terminal 7 of inverter 6. Thus, no current flows usually at the reading time, and at the same time the active resistance effect of FET1 can be eliminated to the potential of terminal 5. As a result, the power consumption is reduced with no output fluctuation caused, thus preventing the malfunction.</p>
申请公布号 JPS54121028(A) 申请公布日期 1979.09.19
申请号 JP19780028943 申请日期 1978.03.13
申请人 NIPPON ELECTRIC CO 发明人 NAKAGAWARA AKIRA
分类号 G11C17/00;G11C14/00;G11C16/04 主分类号 G11C17/00
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