发明名称 |
Register building block with series connected cells to save dissipation loss |
摘要 |
A register building block is disclosed comprising binary memory cells of cross-coupled double emitter transistors which are fed from a source of constant current and addressed by raising the collector potential. Given a predetermined operating voltage, two memory cells are connected in series to save dissipation loss in each constant current circuit. A switch controlled by one bit of the address is used to select one memory cell from the addressed pair of memory cells. The circuit arrangement disclosed is utilized in highly integrated building blocks.
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申请公布号 |
US4168540(A) |
申请公布日期 |
1979.09.18 |
申请号 |
US19780937531 |
申请日期 |
1978.08.28 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
DELKER, KLAUS;WILHELM, WILHELM |
分类号 |
G11C11/41;G11C11/411;G11C11/414;G11C11/415;H03K3/2885;(IPC1-7):G11C11/40;G11C5/06 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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