| 摘要 |
PURPOSE:To ensure a free switching between the efectiveness and the noneffectiveness under operation of the secondary processor for the system in which both the main and secondary processors share the address converting device by memorizing the effectiveness and noneffectiveness for the address conversion when the start is applied to the main processor. CONSTITUTION:Address converting device 2 is shared with main processor 3 and secondary processor 4 which is started by processor 3. In this system, page table 8 is provided to convert logic address 6 produced from processor 3 or 4 into physical address 7, and also memory unit 1 is installed to memorize the effectiveness or noneffectiveness for the address conversion at the time when the start is applied to processor 4 from processor 3, along with the logic gate which delivers address 7 converted via table 8 when the conversion is effective and delivers address 7 with switching when the conversion is noneffective according to the state held in memory unit 1 in accordance with the access from processor 3 or 4. |
