发明名称 SYNTHESIZED OSCILLATOR FOR RADIO DEVICE
摘要 PURPOSE:To realize reduction for the noise, the structure measurements and the cost by constituting the PLL circuit using the voltage control oscillator featuring the oscillation frequency of M- times as high as the final output frequency and then giving M step-division to the output of the voltage control oscillator to obtain the final output. CONSTITUTION:The N1 step-division is given via fixed divider 2 to the output of reference oscillatol 1 featuring the oscillation frequency of M-times as high as the output frequency and then supplied to phase comparator 3. While the output of voltage control oscillator MC010 is mixed with the output of reference oscillator 6 via mixer 7 and undergoes N2 step-division at variable divider 4 through band pass filter 5 which draws out only the difference frequency component to be supplied to comparator 3 where the phase comparison is given with the reference signal given from cscillator 1 with N1 step-division applied. Then the error signal is supplied to VC010 via loop filter 8 and LPF9 to be used for the phase synchronization of VC010. The output of VC010 undergoes M step-division through step-divider 12 to be delivered through terminal 11. In this constitution, the final output phase noise is reduced down to 1/M the output noise of VC010, thus ensuring easy reduction of the noise along with use of the low-noise crystal oscillator to oscillator 1.
申请公布号 JPS54118759(A) 申请公布日期 1979.09.14
申请号 JP19780025410 申请日期 1978.03.08
申请人 HITACHI ELECTRONICS 发明人 FUJIWARA YUKINARI
分类号 H03L7/18;H03L7/185 主分类号 H03L7/18
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