发明名称 MEMORY CIRCUIT ELEMENT
摘要 PURPOSE:To obtain memory circuit elements less in power consumption and small in size, by taking the load impedance element as a diode, in the memory circuit element consisting of two sets of bipolar type transistors Tr. CONSTITUTION:The bipolar type TRQ1, Q2 have two emitters e1, e2, and the collecor is connected to the selection line W1 via the load impedances Z1 and Z2, the base e1 is to the selection line W2 and the base is to the collector of TrQ2, Q1, and the emitter e2 is connected to the detection lines Y1 and Y2. This circuit constitutes FF circuit, and when a required voltage is given to the selection lines W1 and W2, one of Tr is turned ON and another is OFF, constituting the memory circuit. The impedances Z1 and Z2 are constituted with the diodes D1 and D2, and when the coefficient of injection for the diodes is greater, the power consumption is less the same as greater load impedance. In constituting the elements in monolithic with the semiconductor substrate, the diodes are less in area than Tr, and small sized element can be achieved.
申请公布号 JPS54116145(A) 申请公布日期 1979.09.10
申请号 JP19780023415 申请日期 1978.03.01
申请人 NIPPON TELEGRAPH & TELEPHONE 发明人 SUZUKI MASAO;HAYASHI TOSHIO;KAWARADA KUNIYASU
分类号 G11C11/411 主分类号 G11C11/411
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