发明名称 CONTROL SYSTEM FOR LINE CONCENTRATION
摘要 PURPOSE:To enable to cope with the busy state of link while making control entirely the same as the operation under normal communication condition, by providing the flip-flop and selection circuit. CONSTITUTION:When the remote terminal 5-0 transmits the conditional information by using the control information channel of #0 frame, the address counter 13 outputs the address information corresponding to #0 and sets it to the address register 14. Further, the time slot To during #0 frame period is ''1'' and the information existing on the digital line 6 during To period is written in the address designated with the address register 14 of the conditional memory 9 via the AND circuit 16, serial parallel conversion circuit 12, AND circuit 18. With the link in busy condition, flip-flop 11 is set, resetting the AND circuit 18 and enabling to set the AND circuit 17.
申请公布号 JPS54114908(A) 申请公布日期 1979.09.07
申请号 JP19780022222 申请日期 1978.02.28
申请人 FUJITSU LTD 发明人 NAITOU SHIYUNICHI;MASUDA TOORU;YOKOTO TAKASHI
分类号 H04Q3/60;H04M9/02 主分类号 H04Q3/60
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