| 摘要 |
In a plural unit system, particularly of the data processing type, controlled units such as tape drives, constitute status reporting units (SRUs) which report status including error conditions to one or more status analyzing units such as computers (CPUs), programmable controllers, and the like. Each of the SRUs has a register, such as a shift register, associated therewith for receiving error status indications. The signal state of the shift register when all zeros indicates error-free status, any nonzero state signifies an error. An OR circuit receives signals from all of the bit positions of each of the respective shift registers and combines same into an SRU group error indicating signal. A second register, also a shift register, associated with the respective SRUs receives the output of the OR circuit in one of its bit positions, the bit position indicating the address of the reporting SRU. The output of the two shift registers associated with each of the SRUs are serialized onto one wire and supplied to an intermediate shift register. Combined signal status in the intermediate shift register are then supplied to one or more status analyzing units in a two byte format, i.e., one byte for the address and a second byte for the error status. An appropriate status analyzing unit then determines the error condition of the SRU. If more than one SRU is in error, then the address byte will have more than one binary one indicating state requiring further analysis by the respective status analyzing units. |
