| 摘要 |
PURPOSE:To make it possible to sense in a high speed by using dummy cells, which have the same circuit geometrical arrangement as memory cells, as a reference potential generator to drive dummy cells after memory cells at a reading time. CONSTITUTION:In the position corresponding to a reference potential generator, dummy cells DM1 and DM2 which have the same circuit constitution as memory cells MC1 and MC2 are arranged. Meanwhile, a sense amplifier is constituted by switch transistors ST1 and ST2 and load transistors RT1 and RT2. Meanwhile, trigger signal CL to drive an address driver is used as the trigger signal of a dummy cell driver through delay circuit DB. If memory cells keep 0V when digit lines DL1 and DL2 are precharged at 5V, the digit line becomes 4. 7V when memory cells become conductive; and meanwhile, if memory cells keep 10V, the digit time be comes 6V finally. Here, where dummy cell driving pulses are delayed, the output fromdumy cells becomes as shown by the dotted line and appears on DL2. |
