| 摘要 |
PURPOSE:To enable a part of circuit operations to be stopped without increasing any special reset line by providing a clocking unit signal forming circuit and a potential setting circuit which makes the potentials of the high potential side of the supply voltage of a part of clocking device and the potential of the low potential side the same. CONSTITUTION:A potential setting circuit 6 which has a means of making the potentials of the high potential side and low potential side of the supply voltage of at least clocking unit signal forming circuit 2 and a part of clocking device out of a reference signal generating circuit 1, clocking unit signal forming circuit 2, clocking device 3, display device 4 is provided. The potential setting circuit 6 is constituted by MOS-FET 6-1 and resistance element 6-2. Normally, the FET 6-1 is OFF and a potential difference VDD-VSS is held supplied to a circuit block 7, but when a negative potential VSS is applied as a reset input, the FET goes ON and a high potential VDD is supplied to the negative power source line of the circuit block 7, then the high voltage VDD is supplied to both positive and negative terminals of the power source terminals of the circuit 7, thus all the operations stop. |
