| 摘要 |
A data processing system includes as part of its power circuits, a number of converter circuits, each coupled to a different one of the power supply units which are to provide different voltages for distribution and use throughout the system. Each of the power supply circuits furnish a 24 volt dc power confidence signal to a central ac power input entry panel which applies the power confidence signals to the converter circuits. Each converter circuit includes an optically coupled isolator circuit which converts the 24 volt dc signal to a noise free low voltage logic level suitable for utilization by the low level high speed logic circuits included within the system. The output noise free low voltages provided by the converter circuits are in turn applied to a corresponding number of confidence input lines of a system interface unit which includes a plurality of ports, each port connected to a different module within the data processing system. The states of the low voltage logical level signals are stored in a status register. When the operating system determines that a unit is inoperative due to a power supply unit failure, it can logically disconnect the port having a module having the failure. Additionally, one of the converter circuits provides a second output signal which is used to enable the clock circuits during system power up only after the system has been placed in a known state. |
