| 摘要 |
PURPOSE:To eliminate the DC bias voltage while preventing the lowering of the dynamic range by setting the compensation output a little larger than the DC bias of the signal output and also keeping always the difference output at one polarity. CONSTITUTION:The electrode is formed on p-type substrate 25 via insulator film 32, and the electrostatic capacity 29 is provided via the MOS diode. Thus, output (a) and (b) are obtained at terminal 35 and 36, along with waveform (c) obtained as differential output 24. For the signal output, the inductive component (broken lines) of the reset pulse and DC bias V1 are piled on each other. The scale of the inductive component is proportional to the ratio between the capacity between reset electrode 28 and floating layer 30b and the capacity between the substrate and the region including capacity 29 and the gate of FET each, and is accordingly small in comparison with the signal output. As a result, the differential output features the amplitude of a constant voltage V in case no signal exists. In such constitution, the signal of the positive voltage can be secured at all times, and the equivalent signal is never lost even with the signal process circuit of only positive power source. Furthermore, the inductive component can be reduced for the reset pulse by lowering the DC level. |
