发明名称 RESET SIGNAL GENERATOR CIRCUIT
摘要 PURPOSE:To generate a pulse having a pulse width which can make a circuit, which is connected to the output terminal, into a reset state sufficiently by operating MISFETs successively. CONSTITUTION:When the power source potential is applied to power source terminal 2, L level is outputted to output terminal 3. Next, control signal S1 is kept at the ground potential (H level), and control signal S2 is made L-level, and the potential at connection point 11 of MISFETs 6 and 7 is made H-level, and signal S1 is made L-level after making control signal S2 H-level, and then, these operations are repeated. Accompanied with these repeated operations, the potential of output terminal 3 approaches a H-level gradually.
申请公布号 JPS54107251(A) 申请公布日期 1979.08.22
申请号 JP19780014767 申请日期 1978.02.09
申请人 MITSUBISHI ELECTRIC CORP 发明人 HATADA AKIYOSHI
分类号 H03K17/22;H03K4/02;(IPC1-7):03K4/02 主分类号 H03K17/22
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