| 摘要 |
PURPOSE:To realize a divider which features a high-speed operation and is suited for the integrated circuit by changing the output of the memory circuit into the program data setting signal of the divider circuit. CONSTITUTION:The count-down is given from preset value N2, and the contents of the divider reaches ''9''. Thus, the output of carry-out circuit 5 is held at memory circuit 9, and the data value of preset value input terminals P10-P80 and P100- P800 are set for divider circuit 2 and 3 of the rear step by the output of circuit 9. When the count-down is carried out via 1st-step divider 1, the output of carry- out circuit 7 is held at memory circuit 8. Thus, the program data of circut 1 is set, and at the same time the output of circuit 9 is reset. |
