| 摘要 |
PURPOSE:To perform feedback and demultiplication without being affected with the delivery delay time when the output of the pulse generating circuit is inputted to the control circuit, by simplifying the constitution through the sectioning and integration of the blocks of high and low speed operation. CONSTITUTION:When the control input 9 is unchanged, the output of N1, F3 is L and the input CP5 is outputted through OR1 as it is. F1, F2, N1 detect the trailing of the input 9, and the width is more than the period of CP5, then the pulse in H state is produced for one pulse in synchronizing with CP. Accordingly, F3 and OR1 obtains the output interrupting P5 by one pulse. The counter 3 counts down C1, and when the content is 2, the signal is fed back to C1, presetting the demultiplication to A and obtaining the output of demultiplication A at F4. Further, simultaneously, the signal presets C2 and makes F3 to L in synchronizing with the next CP7. B is preset to C2 and F5 and F6 keep L for B sets of CP7 and the pulses 9 of B sets are obtained at OR2. Thus, the demultiplication of A P+B is obtained and the mutual connection is not affected with the delivery delay time. |
