| 摘要 |
A recursive-type digital filter comprising a calculation circuit. The calculation circuit is arranged to multiply an input signal including at least m-bit signal xn inputted at a predetermined sampling period and an output signal yn-k fed back to the input of the calculation circuit in accordance with the input signal xn after being subjected to a delay of k sampling periods by ak and bk coefficients corresponding to the filter characteristics, respectively, and then the products are added thereby to produce data yn of (m+l) bits satisfying, <IMAGE> and serially deliver the upper m-bit data of the data yn as an output signal corresponding to the input signal xn. The filter further comprises a delay circuit for feeding back to the input of the calculation circuit a part of the round off data including the upper (m+1)th bit of the data yn so that the bk coefficient is multiplied by the fedback data of the upper (m+1)th bit and the product is added to the data yn, thereby to produce an output signal with reduced round off noise. |
