| 摘要 |
PURPOSE:To improve the control of write-in threshold current and the write-in operating speed, by controlling the collector parasitic resistance for the write-in NPN transistor especially, in I<2>L memory cell. CONSTITUTION:The N<+> implanted layer 2 of the P type substrate is taken as the lower word line W<->, N<-> epitaxial layer 3 is isolated 4, P layers 5 to 7 are provided, and layers 8 to 11 are formed. The layers 9 and 10 are connected to 6 and 5, the layer 7 is to the drive word line W<+>, and the layers 8 and 11 are to the bit line. Accordingly, by increasing the parasitic resistance rc of the N<-> layer immediately under the layers 8 and 11 of read and write transistor, the write-in threshold current can be decreased. Then, rc is increased by changing the areas omitting the implanted layer as W1 to W3. Thus, the I<2>L memory low in power consumption, greater in capacity and high in readout and write-in speed, can be established. |
