| 摘要 |
PURPOSE:To establish semiconductor memory preamplifier enabling to speed up the operation. CONSTITUTION:A pair of memory cells 2,2' of one transistor type memorizing one bit information are located at the input and output terminal of the preamplifier 1 consisting of the latch circuit in which the input and output of the first and second inverter circuits Q2, Q5 operated in a given timing are connected to other output each other, and the write-in information is inputted from one input and output terminal of the latch circuit. MISFET Q8 driven with one shot pulse formed based on the write-in control timing pulse phirw of the write-in amplifier 3 is provided between other input and output terminal of the latch circuit and the reference potential terminal. |
